Optimal Algorithms for Some Polygon Enclosure Problems for VLSI Layout Analysis

We consider some problems related in VLSI Layout Analysis and Verification and model them as problems of reporting enclosures of polygons. Algorithms are provided using techniques of computational geometry, which solve these problems in optimal time and space.

Bibliographic Details
Published in:Journal of mathematical modelling and algorithms in operations research : JMMA, Vol. 5, No. 3 (2006), p. 259-271
Main Author: Kundeti, Krishna
Other Involved Persons: Gupta, Prosenjit
Format: electronic Article
Item Description:Mathematics Subject Classification (2000):68W99, 51-04.*Work done while the author was a student at I.I.I.T. Hyderabad†Supported in part by grant SR/S/EECE/22/2004 from the Department of Science and Technology, Govt. of India
Physical Description:Online-Ressource
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